This invention relates to accessing multi-ported memory.
In a conventional computing system the central processing unit (CPU), main memory and input/output (I/O) devices are connected by a bus. A “bus master” or “bus arbiter” controls and directs data traffic among the components of the computing system.
Main memory is used as the principal site for storing data. An “access” to main memory writes data to or reads data from main memory. Making an access (or “accessing”) is typically preceded by a request for access from another is component of the system, such as the CPU or an I/O device, followed by a grant of permission by the bus arbiter.
There are two principal types of accesses. The first type is a data access, in which large amounts of data are written to or read from main memory. A data access may be on the order of thousands of bytes. The second type is a control/status access, characterized by a small number of reads or writes to a defined data structure in order to report the status of an input/output device, process data, or initiate some input/output activity. In contrast to data accesses, a control/status access is usually on the order of a few bits. Control accesses are generally initiated by the CPU, while status accesses are generally initiated by the I/O devices.